Rename project

README

@@ -1,4 +1,4 @@
-silabs-dbg-adapter
+silabs-debug-adapter
 
 A debug adapter for Silicon Labs Mini Simplicity targets
 

fp-lib-table

@@ -1,3 +1,3 @@
 (fp_lib_table
-  (lib (name silabs-dbg-adapter)(type KiCad)(uri ${KIPRJMOD}/silabs-dbg-adapter.pretty)(options "")(descr ""))
+  (lib (name silabs-debug-adapter)(type KiCad)(uri ${KIPRJMOD}/silabs-debug-adapter.pretty)(options "")(descr ""))
 )

plot.py

@@ -1,6 +1,6 @@
 #!/usr/bin/env kipy
 
-__copyright__ = 'Copyright 2020 ALT-TEKNIK LLC'
+__copyright__ = 'Copyright 2021 ALT-TEKNIK LLC'
 
 from argparse import ArgumentParser
 from os import path, rename
@@ -46,7 +46,7 @@ class _PadExclusion:
     def __normalize_name(name):
         return _UNNAMED_PAD if name == '~' or name.isspace() else name
 
-_BOARD_NAME = 'silabs-dbg-adapter'
+_BOARD_NAME = 'silabs-debug-adapter'
 _VERSION_TOKEN = 'X.Y.Z'
 _GERBER_EXT_OVERRIDES = {F_Fab: 'gm1', Edge_Cuts: 'gko'}
 

release

@@ -1,6 +1,6 @@
 #!/usr/bin/env -S bash -e
 #
-# Copyright 2020 ALT-TEKNIK LLC
+# Copyright 2021 ALT-TEKNIK LLC
 
 # Parse arguments
 gitea_domain=git.alt-tek.com
@@ -47,7 +47,7 @@ fi
 # Initialize globals used by handle-trap
 signals='INT TERM'
 unset tmp_dir
-prj_name=silabs-dbg-adapter
+prj_name=silabs-debug-adapter
 tea_login=$prj_name-release
 
 # Usage: handle-trap [exit_code]

silabs-debug-adapter-cache.lib

@@ -184,12 +184,12 @@ X VDD 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
-# silabs-dbg-adapter_LinearVoltageRegulator_SOT-23-5
+# silabs-debug-adapter_LinearVoltageRegulator_SOT-23-5
 #
-DEF silabs-dbg-adapter_LinearVoltageRegulator_SOT-23-5 U 0 20 Y Y 1 F N
+DEF silabs-debug-adapter_LinearVoltageRegulator_SOT-23-5 U 0 20 Y Y 1 F N
 F0 "U" -200 200 50 H V C CNN
-F1 "silabs-dbg-adapter_LinearVoltageRegulator_SOT-23-5" 650 200 50 H V C CNN
-F2 "silabs-dbg-adapter:SOT-23-5" 0 -350 50 H I C CNN
+F1 "silabs-debug-adapter_LinearVoltageRegulator_SOT-23-5" 650 200 50 H V C CNN
+F2 "silabs-debug-adapter:SOT-23-5" 0 -350 50 H I C CNN
 F3 "" -350 -50 50 H I C CNN
 DRAW
 S -250 150 250 -150 0 1 0 f
@@ -201,12 +201,12 @@ X OUT 5 350 50 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
-# silabs-dbg-adapter_SBE807
+# silabs-debug-adapter_SBE807
 #
-DEF silabs-dbg-adapter_SBE807 D 0 20 Y N 2 F N
+DEF silabs-debug-adapter_SBE807 D 0 20 Y N 2 F N
 F0 "D" 0 100 50 H V C CNN
-F1 "silabs-dbg-adapter_SBE807" 0 -100 50 H V C CNN
-F2 "silabs-dbg-adapter:SOT-23-5" 0 -200 50 H I C CNN
+F1 "silabs-debug-adapter_SBE807" 0 -100 50 H V C CNN
+F2 "silabs-debug-adapter:SOT-23-5" 0 -200 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
  TO-???*
@@ -229,11 +229,11 @@ X K2 4 200 0 100 L 50 50 2 1 P
 ENDDRAW
 ENDDEF
 #
-# silabs-dbg-adapter_SW_SPDT
+# silabs-debug-adapter_SW_SPDT
 #
-DEF silabs-dbg-adapter_SW_SPDT SW 0 20 Y N 1 F N
+DEF silabs-debug-adapter_SW_SPDT SW 0 20 Y N 1 F N
 F0 "SW" 0 170 50 H V C CNN
-F1 "silabs-dbg-adapter_SW_SPDT" 0 -175 50 H V C CNN
+F1 "silabs-debug-adapter_SW_SPDT" 0 -175 50 H V C CNN
 F2 "" 100 50 50 H I C CNN
 F3 "" 100 50 50 H I C CNN
 DRAW

silabs-debug-adapter.kicad_pcb

@@ -150,7 +150,7 @@
     (add_net ~SRST)
   )
 
-  (module silabs-dbg-adapter:ALT-TEK_7.874x2.032mm locked (layer F.Cu) (tedit 5F403423) (tstamp 5F2CA9F4)
+  (module silabs-debug-adapter:ALT-TEK_7.874x2.032mm locked (layer F.Cu) (tedit 5F403423) (tstamp 5F2CA9F4)
     (at 140.64361 96.20631)
     (descr "ALT-TEK solder mask logo, 7.874x2.032mm")
     (attr virtual)
@@ -481,7 +481,7 @@
       (xy -0.024554 0.273473)) (layer F.Mask) (width 0.00254))
   )
 
-  (module silabs-dbg-adapter:EdgeHeaderSocket_2x10_P2.54mm locked (layer F.Cu) (tedit 5F402CB5) (tstamp 5F2935D4)
+  (module silabs-debug-adapter:EdgeHeaderSocket_2x10_P2.54mm locked (layer F.Cu) (tedit 5F402CB5) (tstamp 5F2935D4)
     (at 151.13 116.205 270)
     (descr "Edge-aligned through-hole straight/angled IDC-compatible header/socket, 2x10, 2.54mm pitch")
     (path /5EF8049F)
@@ -550,14 +550,14 @@
       (net 15 "Net-(J1-Pad3)"))
     (pad 1 thru_hole roundrect (at 0 0 90) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.145)
       (net 16 VDD))
-    (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/IDCSocket_2x10_P2.54mm_Vertical.step
+    (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/IDCSocket_2x10_P2.54mm_Vertical.step
       (offset (xyz 1.27 -10.16 -10.287))
       (scale (xyz 1 1 1))
       (rotate (xyz 90 0 0))
     )
   )
 
-  (module silabs-dbg-adapter:450302014072 locked (layer F.Cu) (tedit 5F402D5E) (tstamp 5F29E88F)
+  (module silabs-debug-adapter:450302014072 locked (layer F.Cu) (tedit 5F402D5E) (tstamp 5F29E88F)
     (at 131.04 99.38 270)
     (descr "Edge-aligned through-hole horizontal slide switch, SPDT")
     (path /5EF8B98C)
@@ -594,14 +594,14 @@
       (net 16 VDD))
     (pad 1 thru_hole circle (at 0 0 270) (size 1.7272 1.7272) (drill 0.8) (layers *.Cu *.Mask)
       (net 4 "Net-(C3-Pad1)"))
-    (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/450302014072.step
+    (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/450302014072.step
       (offset (xyz -0.4 0 1.2))
       (scale (xyz 1 1 1))
       (rotate (xyz 90 0 -90))
     )
   )
 
-  (module silabs-dbg-adapter:SOT-23-5 locked (layer F.Cu) (tedit 5EFB94A3) (tstamp 5F250CE9)
+  (module silabs-debug-adapter:SOT-23-5 locked (layer F.Cu) (tedit 5EFB94A3) (tstamp 5F250CE9)
     (at 139.7 101.81 90)
     (descr "5-pin SOT-23")
     (path /5F302496)
@@ -643,7 +643,7 @@
     )
   )
 
-  (module silabs-dbg-adapter:430182043816 locked (layer F.Cu) (tedit 5EFBF1C5) (tstamp 5F294D71)
+  (module silabs-debug-adapter:430182043816 locked (layer F.Cu) (tedit 5EFBF1C5) (tstamp 5F294D71)
     (at 149.81 98.73)
     (descr "Surface-mount vertical push-button switch, SPST")
     (path /5EF88383)
@@ -675,7 +675,7 @@
       (net 24 "Net-(R1-Pad2)"))
     (pad 1 smd roundrect (at -3.975 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192)
       (net 1 GND))
-    (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/430182043816.step
+    (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/430182043816.step
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
       (rotate (xyz 0 0 0))
@@ -1078,7 +1078,7 @@
     )
   )
 
-  (module silabs-dbg-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD locked (layer F.Cu) (tedit 5EFB9375) (tstamp 5F29865D)
+  (module silabs-debug-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD locked (layer F.Cu) (tedit 5EFB9375) (tstamp 5F29865D)
     (at 148.23 107.14 270)
     (descr "Surface-mount straight IDC header, 2x5, 1.27mm pitch")
     (path /5EF81A6E)
@@ -1128,14 +1128,14 @@
       (net 1 GND))
     (pad 1 smd roundrect (at -2.032 -2.54 270) (size 2.794 0.762) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 16 VDD))
-    (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/IDCHeader_2x05_P1.27mm_Vertical_SMD.step
+    (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/IDCHeader_2x05_P1.27mm_Vertical_SMD.step
       (offset (xyz 12.7 0.63 2.35))
       (scale (xyz 1 1 1))
       (rotate (xyz -90 0 90))
     )
   )
 
-  (module silabs-dbg-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD locked (layer F.Cu) (tedit 5EFB9375) (tstamp 5F294237)
+  (module silabs-debug-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD locked (layer F.Cu) (tedit 5EFB9375) (tstamp 5F294237)
     (at 131.17 107.14 270)
     (descr "Surface-mount straight IDC header, 2x5, 1.27mm pitch")
     (path /5EF83D2A)
@@ -1185,14 +1185,14 @@
       (net 13 TMS_SWDIO))
     (pad 1 smd roundrect (at -2.032 -2.54 270) (size 2.794 0.762) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 16 VDD))
-    (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/IDCHeader_2x05_P1.27mm_Vertical_SMD.step
+    (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/IDCHeader_2x05_P1.27mm_Vertical_SMD.step
       (offset (xyz 12.7 0.63 2.35))
       (scale (xyz 1 1 1))
       (rotate (xyz -90 0 90))
     )
   )
 
-  (module silabs-dbg-adapter:SOT-23-5 locked (layer F.Cu) (tedit 5EFB94A3) (tstamp 5F250B86)
+  (module silabs-debug-adapter:SOT-23-5 locked (layer F.Cu) (tedit 5EFB94A3) (tstamp 5F250B86)
     (at 139.7 107.47 90)
     (descr "5-pin SOT-23")
     (path /5F36263E)
@@ -1342,7 +1342,7 @@
     )
   )
 
-  (gr_text "SILABS-DBG-ADAPTER\nvX.Y.Z\n© 2020 ALT-TEKNIK LLC" (at 123.571 115.062) (layer F.Fab)
+  (gr_text "SILABS-DEBUG-ADAPTER\nvX.Y.Z\n© 2021 ALT-TEKNIK LLC" (at 123.571 115.062) (layer F.Fab)
     (effects (font (size 0.666667 0.666667) (thickness 0.1)) (justify left))
   )
   (gr_text "DESIGNED BY ALT-TEKNIK LLC\nDEEP IN THE HEART OF TEXAS" (at 139.7 95.885) (layer B.Mask)

silabs-debug-adapter.lib

@@ -6,7 +6,7 @@ EESchema-LIBRARY Version 2.4
 DEF LinearVoltageRegulator_SOT-23-5 U 0 20 Y Y 1 F N
 F0 "U" -200 200 50 H V C CNN
 F1 "LinearVoltageRegulator_SOT-23-5" 650 200 50 H V C CNN
-F2 "silabs-dbg-adapter:SOT-23-5" 0 -350 50 H I C CNN
+F2 "silabs-debug-adapter:SOT-23-5" 0 -350 50 H I C CNN
 F3 "" -350 -50 50 H I C CNN
 DRAW
 S -250 150 250 -150 0 1 0 f
@@ -23,7 +23,7 @@ ENDDEF
 DEF SBE807 D 0 20 Y N 2 F N
 F0 "D" 0 100 50 H V C CNN
 F1 "SBE807" 0 -100 50 H V C CNN
-F2 "silabs-dbg-adapter:SOT-23-5" 0 -200 50 H I C CNN
+F2 "silabs-debug-adapter:SOT-23-5" 0 -200 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
  TO-???*

silabs-debug-adapter.pretty/430182043816.kicad_mod

@@ -24,7 +24,7 @@
   (pad 2 smd roundrect (at -3.975 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192))
   (pad 1 smd roundrect (at 3.975 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192))
   (pad 2 smd roundrect (at 3.975 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.192))
-  (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/430182043816.step
+  (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/430182043816.step
     (at (xyz 0 0 0))
     (scale (xyz 1 1 1))
     (rotate (xyz 0 0 0))

silabs-debug-adapter.pretty/450302014072.kicad_mod

@@ -30,7 +30,7 @@
   (pad 1 thru_hole circle (at 0 0) (size 1.7272 1.7272) (drill 0.8) (layers *.Cu *.Mask))
   (pad 2 thru_hole circle (at 0 2.54) (size 1.7272 1.7272) (drill 0.8) (layers *.Cu *.Mask))
   (pad 3 thru_hole circle (at 0 -2.54) (size 1.7272 1.7272) (drill 0.8) (layers *.Cu *.Mask))
-  (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/450302014072.step
+  (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/450302014072.step
     (offset (xyz -0.4 0 1.2))
     (scale (xyz 1 1 1))
     (rotate (xyz 90 0 -90))

silabs-debug-adapter.pretty/EdgeHeaderSocket_2x10_P2.54mm.kicad_mod

@@ -45,7 +45,7 @@
   (pad 16 thru_hole circle (at 2.54 17.78 180) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
   (pad 18 thru_hole circle (at 2.54 20.32 180) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
   (pad 20 thru_hole circle (at 2.54 22.86 180) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
-  (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/IDCSocket_2x10_P2.54mm_Vertical.step
+  (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/IDCSocket_2x10_P2.54mm_Vertical.step
     (offset (xyz 1.27 -10.16 -10.287))
     (scale (xyz 1 1 1))
     (rotate (xyz 90 0 0))

silabs-debug-adapter.pretty/IDCHeader_2x05_P1.27mm_Vertical_SMD.kicad_mod

@@ -36,7 +36,7 @@
   (pad 8 smd roundrect (at 2.032 1.27) (size 2.794 0.762) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
   (pad 9 smd roundrect (at -2.032 2.54) (size 2.794 0.762) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
   (pad 10 smd roundrect (at 2.032 2.54) (size 2.794 0.762) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
-  (model ${KIPRJMOD}/silabs-dbg-adapter.3dshapes/IDCHeader_2x05_P1.27mm_Vertical_SMD.step
+  (model ${KIPRJMOD}/silabs-debug-adapter.3dshapes/IDCHeader_2x05_P1.27mm_Vertical_SMD.step
     (offset (xyz 12.7 0.63 2.35))
     (scale (xyz 1 1 1))
     (rotate (xyz -90 0 90))

silabs-debug-adapter.sch

@@ -11,7 +11,7 @@ Comp "ALT-TEKNIK LLC"
 Comment1 ""
 Comment2 ""
 Comment3 ""
-Comment4 "© 2020 ALT-TEKNIK LLC"
+Comment4 "© 2021 ALT-TEKNIK LLC"
 $EndDescr
 $Comp
 L Device:R R2
@@ -266,7 +266,7 @@ U 1 1 5EF8049F
 P 3400 2950
 F 0 "J1" H 3450 2317 50  0000 C CNN
 F 1 "SFH11-PBPC-D10-ST-BK" H 3450 2226 50  0000 C CNN
-F 2 "silabs-dbg-adapter:EdgeHeaderSocket_2x10_P2.54mm" H 3400 2950 50  0001 C CNN
+F 2 "silabs-debug-adapter:EdgeHeaderSocket_2x10_P2.54mm" H 3400 2950 50  0001 C CNN
 F 3 "~" H 3400 2950 50  0001 C CNN
 	1    3400 2950
 	1    0    0    -1  
@@ -324,7 +324,7 @@ U 1 1 5EF88383
 P 2300 4000
 F 0 "SW1" V 2346 4147 50  0000 L CNN
 F 1 "430182043816" V 2255 4147 50  0000 L CNN
-F 2 "silabs-dbg-adapter:430182043816" H 2300 4200 50  0001 C CNN
+F 2 "silabs-debug-adapter:430182043816" H 2300 4200 50  0001 C CNN
 F 3 "~" H 2300 4200 50  0001 C CNN
 	1    2300 4000
 	0    -1   -1   0   
@@ -391,12 +391,12 @@ Wire Wire Line
 Wire Wire Line
 	3700 2550 3750 2550
 $Comp
-L silabs-dbg-adapter:LinearVoltageRegulator_SOT-23-5 U1
+L silabs-debug-adapter:LinearVoltageRegulator_SOT-23-5 U1
 U 1 1 5F302496
 P 5150 2600
 F 0 "U1" H 5150 2915 50  0000 C CNN
 F 1 "MCP1812BT-033/OT" H 5150 2824 50  0000 C CNN
-F 2 "silabs-dbg-adapter:SOT-23-5" H 5150 2300 50  0001 C CNN
+F 2 "silabs-debug-adapter:SOT-23-5" H 5150 2300 50  0001 C CNN
 F 3 "" H 4800 2600 50  0001 C CNN
 	1    5150 2600
 	1    0    0    -1  
@@ -426,7 +426,7 @@ U 1 1 5EF81A6E
 P 7600 4750
 F 0 "J3" H 7650 5167 50  0000 C CNN
 F 1 "20021521-00010" H 7650 5076 50  0000 C CNN
-F 2 "silabs-dbg-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD" H 7600 4750 50  0001 C CNN
+F 2 "silabs-debug-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD" H 7600 4750 50  0001 C CNN
 F 3 "~" H 7600 4750 50  0001 C CNN
 	1    7600 4750
 	1    0    0    -1  
@@ -452,12 +452,12 @@ Wire Wire Line
 Wire Wire Line
 	2950 5850 3200 5850
 $Comp
-L silabs-dbg-adapter:SW_SPDT SW2
+L silabs-debug-adapter:SW_SPDT SW2
 U 1 1 5EF8B98C
 P 5950 2450
 F 0 "SW2" H 5950 2125 50  0000 C CNN
 F 1 "450302014072" H 5950 2216 50  0000 C CNN
-F 2 "silabs-dbg-adapter:450302014072" H 6050 2500 50  0001 C CNN
+F 2 "silabs-debug-adapter:450302014072" H 6050 2500 50  0001 C CNN
 F 3 "" H 6050 2500 50  0001 C CNN
 	1    5950 2450
 	1    0    0    1   
@@ -521,29 +521,29 @@ U 1 1 5EF83D2A
 P 3400 6050
 F 0 "J2" H 3450 6467 50  0000 C CNN
 F 1 "20021521-00010" H 3450 6376 50  0000 C CNN
-F 2 "silabs-dbg-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD" H 3400 6050 50  0001 C CNN
+F 2 "silabs-debug-adapter:IDCHeader_2x05_P1.27mm_Vertical_SMD" H 3400 6050 50  0001 C CNN
 F 3 "~" H 3400 6050 50  0001 C CNN
 	1    3400 6050
 	1    0    0    -1  
 $EndComp
 $Comp
-L silabs-dbg-adapter:SBE807 D1
+L silabs-debug-adapter:SBE807 D1
 U 1 1 5F36263E
 P 4350 2550
 F 0 "D1" H 4350 2767 50  0000 C CNN
 F 1 "SBE807" H 4350 2676 50  0000 C CNN
-F 2 "silabs-dbg-adapter:SOT-23-5" H 4350 2350 50  0001 C CNN
+F 2 "silabs-debug-adapter:SOT-23-5" H 4350 2350 50  0001 C CNN
 F 3 "https://www.onsemi.com/pub/Collateral/ENA1055-D.PDF" H 4350 2550 50  0001 C CNN
 	1    4350 2550
 	1    0    0    -1  
 $EndComp
 $Comp
-L silabs-dbg-adapter:SBE807 D1
+L silabs-debug-adapter:SBE807 D1
 U 2 1 5F364927
 P 4850 2200
 F 0 "D1" H 4850 1975 50  0000 C CNN
 F 1 "SBE807" H 4850 2066 50  0000 C CNN
-F 2 "silabs-dbg-adapter:SOT-23-5" H 4850 2000 50  0001 C CNN
+F 2 "silabs-debug-adapter:SOT-23-5" H 4850 2000 50  0001 C CNN
 F 3 "https://www.onsemi.com/pub/Collateral/ENA1055-D.PDF" H 4850 2200 50  0001 C CNN
 	2    4850 2200
 	-1   0    0    1   

sym-lib-table

@@ -1,3 +1,3 @@
 (sym_lib_table
-  (lib (name silabs-dbg-adapter)(type Legacy)(uri ${KIPRJMOD}/silabs-dbg-adapter.lib)(options "")(descr ""))
+  (lib (name silabs-debug-adapter)(type Legacy)(uri ${KIPRJMOD}/silabs-debug-adapter.lib)(options "")(descr ""))
 )