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Configure board and roughly place components

main
Nathan L. Conrad 5 years ago
parent 67df777d15
commit 38fba3a0d4

File diff suppressed because it is too large Load Diff

@ -1,4 +1,4 @@
(module BGTEX (layer F.Cu) (tedit 5F32DF72)
(module BGTEX (layer F.Cu) (tedit 5F349335)
(descr "Edge-aligned through-hole horizontal/vertical wireless system-on-module")
(fp_text reference REF** (at -4.175 11.43 -90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
@ -6,27 +6,27 @@
(fp_text value BGTEX (at 25.13 11.43 -90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 20.955 -1.27) (end 22.055 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -2.175 -5.08) (end -3.175 -4.08) (layer F.Fab) (width 0.1))
(fp_line (start -3.175 27.94) (end 24.13 27.94) (layer F.Fab) (width 0.1))
(fp_line (start -2.175 -5.08) (end 24.13 -5.08) (layer F.Fab) (width 0.1))
(fp_line (start -3.175 -4.08) (end -3.175 27.94) (layer F.Fab) (width 0.1))
(fp_line (start -3.675 -5.58) (end -3.675 28.44) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.675 -5.58) (end 24.13 -5.58) (layer F.CrtYd) (width 0.05))
(fp_line (start 24.13 -5.58) (end 24.13 28.44) (layer F.CrtYd) (width 0.05))
(fp_line (start 24.13 28.44) (end -3.675 28.44) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.285 -5.19) (end 23.6855 -5.19) (layer F.SilkS) (width 0.12))
(fp_line (start -3.285 28.05) (end -3.285 -5.19) (layer F.SilkS) (width 0.12))
(fp_line (start 23.6855 28.05) (end -3.285 28.05) (layer F.SilkS) (width 0.12))
(fp_line (start 24.13 28.44) (end -3.675 28.44) (layer B.CrtYd) (width 0.05))
(fp_line (start 24.13 -5.58) (end 24.13 28.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.675 -5.58) (end 24.13 -5.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.675 -5.58) (end -3.675 28.44) (layer B.CrtYd) (width 0.05))
(fp_circle (center 20.955 24.13) (end 22.055 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 24.13 -5.08) (end 24.13 27.94) (layer F.Fab) (width 0.1))
(fp_line (start 24.13 28.44) (end -3.675 28.44) (layer F.CrtYd) (width 0.05))
(fp_line (start 24.13 -5.58) (end 24.13 28.44) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.675 -5.58) (end 24.13 -5.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.675 -5.58) (end -3.675 28.44) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.175 -4.08) (end -3.175 27.94) (layer F.Fab) (width 0.1))
(fp_line (start -2.175 -5.08) (end 24.13 -5.08) (layer F.Fab) (width 0.1))
(fp_line (start -3.175 27.94) (end 24.13 27.94) (layer F.Fab) (width 0.1))
(fp_line (start -2.175 -5.08) (end -3.175 -4.08) (layer F.Fab) (width 0.1))
(fp_circle (center 20.955 -1.27) (end 22.055 -1.27) (layer F.Fab) (width 0.1))
(fp_text user %R (at 10.4775 11.43 -90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 20.955 24.13) (end 22.055 24.13) (layer F.Fab) (width 0.1))
(fp_line (start -3.675 -5.58) (end -3.675 28.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.675 -5.58) (end 24.13 -5.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 24.13 -5.58) (end 24.13 28.44) (layer B.CrtYd) (width 0.05))
(fp_line (start 24.13 28.44) (end -3.675 28.44) (layer B.CrtYd) (width 0.05))
(fp_line (start 23.6855 28.05) (end -3.285 28.05) (layer F.SilkS) (width 0.12))
(fp_line (start -3.285 28.05) (end -3.285 -5.19) (layer F.SilkS) (width 0.12))
(fp_line (start -3.285 -5.19) (end 23.6855 -5.19) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole roundrect (at 0 0) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.145))
(pad 3 thru_hole circle (at 0 2.54) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 0 5.08) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
@ -47,26 +47,26 @@
(pad 16 thru_hole circle (at 2.54 17.78) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 18 thru_hole circle (at 2.54 20.32) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 20 thru_hole circle (at 2.54 22.86) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole circle (at 12.43 7.62) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 12.43 5.08) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 12.43 2.54) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 11 thru_hole circle (at 12.43 12.7) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at 12.43 10.16) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 15 thru_hole circle (at 12.43 17.78) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 13 thru_hole circle (at 12.43 15.24) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 20 thru_hole circle (at 9.89 22.86) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 18 thru_hole circle (at 9.89 20.32) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 16 thru_hole circle (at 9.89 17.78) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 14 thru_hole circle (at 9.89 15.24) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 12 thru_hole circle (at 9.89 12.7) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole circle (at 9.89 10.16) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at 9.89 7.62) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at 9.89 5.08) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 9.89 2.54) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 9.89 0) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 19 thru_hole circle (at 12.43 22.86) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 17 thru_hole circle (at 12.43 20.32) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 1 thru_hole roundrect (at 12.43 0) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.145))
(pad 7 thru_hole circle (at 12.7 7.62) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 12.7 5.08) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 12.7 2.54) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 11 thru_hole circle (at 12.7 12.7) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at 12.7 10.16) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 15 thru_hole circle (at 12.7 17.78) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 13 thru_hole circle (at 12.7 15.24) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 20 thru_hole circle (at 10.16 22.86) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 18 thru_hole circle (at 10.16 20.32) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 16 thru_hole circle (at 10.16 17.78) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 14 thru_hole circle (at 10.16 15.24) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 12 thru_hole circle (at 10.16 12.7) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole circle (at 10.16 10.16) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at 10.16 7.62) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at 10.16 5.08) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 10.16 2.54) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 10.16 0) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 19 thru_hole circle (at 12.7 22.86) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 17 thru_hole circle (at 12.7 20.32) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask))
(pad 1 thru_hole roundrect (at 12.7 0) (size 1.7272 1.7272) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.145))
(pad 3 thru_hole circle (at 20.955 -1.27) (size 5 5) (drill 2.2) (layers *.Cu *.Mask)
(zone_connect 2))
(pad 3 thru_hole circle (at 22.755 -1.27) (size 0.508 0.508) (drill 0.254) (layers *.Cu *.Mask)

@ -1,29 +1,10 @@
update=22/05/2015 07:44:53
update=Thursday, August 13, 2020 at 01:52:06 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
@ -31,3 +12,229 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.5748
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.3048
MinViaDiameter=0.508
MinViaDrill=0.254
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.254
MinHoleToHole=0.254
TrackWidth1=0.3048
TrackWidth2=0.508
TrackWidth3=0.8128
ViaDiameter1=0.508
ViaDrill1=0.254
dPairWidth1=0.3048
dPairGap1=0.254
dPairViaGap1=0.25
SilkLineWidth=0.127
SilkTextSizeV=0.9144
SilkTextSizeH=1.016
SilkTextSizeThickness=0.127
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.0508
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.0508
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=0
[pcbnew/Layer.F.Adhes]
Enabled=0
[pcbnew/Layer.B.Paste]
Enabled=0
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=0
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=0
[pcbnew/Layer.Eco2.User]
Enabled=0
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=0
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.254
TrackWidth=0.3048
ViaDiameter=0.508
ViaDrill=0.254
uViaDiameter=0.508
uViaDrill=0.254
dPairWidth=0.3048
dPairGap=0.254
dPairViaGap=0.25

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