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76 lines
4.0 KiB
C
76 lines
4.0 KiB
C
/**************************************************************************//**
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* @file
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* @brief BGM22 FSRCO register and bit field definitions
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******************************************************************************
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* # License
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* <b>Copyright 2021 Silicon Laboratories, Inc. www.silabs.com</b>
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******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*****************************************************************************/
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#ifndef BGM22_FSRCO_H
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#define BGM22_FSRCO_H
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#define FSRCO_HAS_SET_CLEAR
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/**************************************************************************//**
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* @addtogroup Parts
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* @{
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******************************************************************************/
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/**************************************************************************//**
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* @defgroup BGM22_FSRCO FSRCO
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* @{
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* @brief BGM22 FSRCO Register Declaration.
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*****************************************************************************/
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/** FSRCO Register Declaration. */
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typedef struct {
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__IM uint32_t IPVERSION; /**< IP Version */
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uint32_t RESERVED0[1023U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_SET; /**< IP Version */
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uint32_t RESERVED1[1023U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_CLR; /**< IP Version */
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uint32_t RESERVED2[1023U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_TGL; /**< IP Version */
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} FSRCO_TypeDef;
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/** @} End of group BGM22_FSRCO */
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/**************************************************************************//**
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* @addtogroup BGM22_FSRCO
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* @{
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* @defgroup BGM22_FSRCO_BitFields FSRCO Bit Fields
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* @{
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*****************************************************************************/
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/* Bit fields for FSRCO IPVERSION */
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#define _FSRCO_IPVERSION_RESETVALUE 0x00000000UL /**< Default value for FSRCO_IPVERSION */
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#define _FSRCO_IPVERSION_MASK 0xFFFFFFFFUL /**< Mask for FSRCO_IPVERSION */
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#define _FSRCO_IPVERSION_IPVERSION_SHIFT 0 /**< Shift value for FSRCO_IPVERSION */
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#define _FSRCO_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL /**< Bit mask for FSRCO_IPVERSION */
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#define _FSRCO_IPVERSION_IPVERSION_DEFAULT 0x00000000UL /**< Mode DEFAULT for FSRCO_IPVERSION */
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#define FSRCO_IPVERSION_IPVERSION_DEFAULT (_FSRCO_IPVERSION_IPVERSION_DEFAULT << 0) /**< Shifted mode DEFAULT for FSRCO_IPVERSION */
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/** @} End of group BGM22_FSRCO_BitFields */
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/** @} End of group BGM22_FSRCO */
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/** @} End of group Parts */
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#endif /* BGM22_FSRCO_H */
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