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408 lines
7.7 KiB
C
408 lines
7.7 KiB
C
/***************************************************************************//**
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* @file
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* @brief CMSIS Compatible EFM32LG startup file in C for IAR EWARM
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*******************************************************************************
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* # License
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* <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
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*******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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******************************************************************************/
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#include <stdbool.h>
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#include "em_device.h" /* The correct device header file. */
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#pragma language=extended
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#pragma segment="CSTACK"
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/* IAR start function */
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extern void __iar_program_start(void);
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/* CMSIS init function */
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extern void SystemInit(void);
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/* Auto defined by linker */
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extern unsigned char CSTACK$$Limit;
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__weak void Reset_Handler(void)
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{
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SystemInit();
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__iar_program_start();
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}
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/* Provide a dummy value for the sl_app_properties symbol. */
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void sl_app_properties(void); /* Prototype to please MISRA checkers. */
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__weak void sl_app_properties(void)
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{
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}
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__weak void NMI_Handler(void)
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{
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while (true) {
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}
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}
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__weak void HardFault_Handler(void)
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{
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while (true) {
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}
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}
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__weak void MemManage_Handler(void)
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{
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while (true) {
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}
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}
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__weak void BusFault_Handler(void)
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{
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while (true) {
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}
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}
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__weak void UsageFault_Handler(void)
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{
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while (true) {
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}
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}
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__weak void SVC_Handler(void)
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{
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while (true) {
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}
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}
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__weak void DebugMon_Handler(void)
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{
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while (true) {
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}
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}
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__weak void PendSV_Handler(void)
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{
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while (true) {
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}
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}
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__weak void SysTick_Handler(void)
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{
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while (true) {
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}
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}
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__weak void DMA_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void GPIO_EVEN_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void TIMER0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void USART0_RX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void USART0_TX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void USB_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void ACMP0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void ADC0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void DAC0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void I2C0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void I2C1_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void GPIO_ODD_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void TIMER1_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void TIMER2_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void TIMER3_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void USART1_RX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void USART1_TX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void LESENSE_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void USART2_RX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void USART2_TX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void UART0_RX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void UART0_TX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void UART1_RX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void UART1_TX_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void LEUART0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void LEUART1_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void LETIMER0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void PCNT0_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void PCNT1_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void PCNT2_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void RTC_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void BURTC_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void CMU_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void VCMP_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void LCD_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void MSC_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void AES_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void EBI_IRQHandler(void)
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{
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while (true) {
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}
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}
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__weak void EMU_IRQHandler(void)
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{
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while (true) {
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}
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}
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#pragma data_alignment=256
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#pragma location = ".intvec"
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const tVectorEntry __vector_table[] = {
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{ .topOfStack = &CSTACK$$Limit }, /* With IAR, the CSTACK is defined via */
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/* project options settings */
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{ Reset_Handler },
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{ NMI_Handler },
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{ HardFault_Handler },
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{ MemManage_Handler },
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{ BusFault_Handler },
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{ UsageFault_Handler },
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{ 0 },
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{ 0 },
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{ 0 },
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{ 0 },
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{ SVC_Handler },
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{ DebugMon_Handler },
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{ sl_app_properties },
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{ PendSV_Handler },
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{ SysTick_Handler },
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{ DMA_IRQHandler }, /* 0 */
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{ GPIO_EVEN_IRQHandler }, /* 1 */
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{ TIMER0_IRQHandler }, /* 2 */
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{ USART0_RX_IRQHandler }, /* 3 */
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{ USART0_TX_IRQHandler }, /* 4 */
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{ USB_IRQHandler }, /* 5 */
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{ ACMP0_IRQHandler }, /* 6 */
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{ ADC0_IRQHandler }, /* 7 */
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{ DAC0_IRQHandler }, /* 8 */
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{ I2C0_IRQHandler }, /* 9 */
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{ I2C1_IRQHandler }, /* 10 */
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{ GPIO_ODD_IRQHandler }, /* 11 */
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{ TIMER1_IRQHandler }, /* 12 */
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{ TIMER2_IRQHandler }, /* 13 */
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{ TIMER3_IRQHandler }, /* 14 */
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{ USART1_RX_IRQHandler }, /* 15 */
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{ USART1_TX_IRQHandler }, /* 16 */
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{ LESENSE_IRQHandler }, /* 17 */
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{ USART2_RX_IRQHandler }, /* 18 */
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{ USART2_TX_IRQHandler }, /* 19 */
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{ UART0_RX_IRQHandler }, /* 20 */
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{ UART0_TX_IRQHandler }, /* 21 */
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{ UART1_RX_IRQHandler }, /* 22 */
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{ UART1_TX_IRQHandler }, /* 23 */
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{ LEUART0_IRQHandler }, /* 24 */
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{ LEUART1_IRQHandler }, /* 25 */
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{ LETIMER0_IRQHandler }, /* 26 */
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{ PCNT0_IRQHandler }, /* 27 */
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{ PCNT1_IRQHandler }, /* 28 */
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{ PCNT2_IRQHandler }, /* 29 */
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{ RTC_IRQHandler }, /* 30 */
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{ BURTC_IRQHandler }, /* 31 */
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{ CMU_IRQHandler }, /* 32 */
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{ VCMP_IRQHandler }, /* 33 */
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{ LCD_IRQHandler }, /* 34 */
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{ MSC_IRQHandler }, /* 35 */
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{ AES_IRQHandler }, /* 36 */
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{ EBI_IRQHandler }, /* 37 */
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{ EMU_IRQHandler }, /* 38 */
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{ 0 }, /* 39 - Reserved */
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};
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