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85 lines
4.8 KiB
C
85 lines
4.8 KiB
C
/**************************************************************************//**
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* @file
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* @brief BGM22 LDMAXBAR register and bit field definitions
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******************************************************************************
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* # License
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* <b>Copyright 2021 Silicon Laboratories, Inc. www.silabs.com</b>
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******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*****************************************************************************/
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#ifndef BGM22_LDMAXBAR_H
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#define BGM22_LDMAXBAR_H
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#define LDMAXBAR_HAS_SET_CLEAR
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/**************************************************************************//**
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* @addtogroup Parts
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* @{
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******************************************************************************/
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/**************************************************************************//**
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* @defgroup BGM22_LDMAXBAR LDMAXBAR
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* @{
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* @brief BGM22 LDMAXBAR Register Declaration.
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*****************************************************************************/
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/** LDMAXBAR CH Register Group Declaration. */
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typedef struct {
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__IOM uint32_t REQSEL; /**< Channel Peripheral Request Select Reg... */
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} LDMAXBAR_CH_TypeDef;
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/** LDMAXBAR Register Declaration. */
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typedef struct {
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LDMAXBAR_CH_TypeDef CH[8U]; /**< DMA Channel Registers */
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uint32_t RESERVED0[1016U]; /**< Reserved for future use */
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LDMAXBAR_CH_TypeDef CH_SET[8U]; /**< DMA Channel Registers */
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uint32_t RESERVED1[1016U]; /**< Reserved for future use */
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LDMAXBAR_CH_TypeDef CH_CLR[8U]; /**< DMA Channel Registers */
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uint32_t RESERVED2[1016U]; /**< Reserved for future use */
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LDMAXBAR_CH_TypeDef CH_TGL[8U]; /**< DMA Channel Registers */
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} LDMAXBAR_TypeDef;
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/** @} End of group BGM22_LDMAXBAR */
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/**************************************************************************//**
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* @addtogroup BGM22_LDMAXBAR
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* @{
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* @defgroup BGM22_LDMAXBAR_BitFields LDMAXBAR Bit Fields
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* @{
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*****************************************************************************/
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/* Bit fields for LDMAXBAR CH_REQSEL */
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#define _LDMAXBAR_CH_REQSEL_RESETVALUE 0x00000000UL /**< Default value for LDMAXBAR_CH_REQSEL */
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#define _LDMAXBAR_CH_REQSEL_MASK 0x003F000FUL /**< Mask for LDMAXBAR_CH_REQSEL */
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#define _LDMAXBAR_CH_REQSEL_SIGSEL_SHIFT 0 /**< Shift value for LDMAXBAR_SIGSEL */
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#define _LDMAXBAR_CH_REQSEL_SIGSEL_MASK 0xFUL /**< Bit mask for LDMAXBAR_SIGSEL */
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#define _LDMAXBAR_CH_REQSEL_SIGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LDMAXBAR_CH_REQSEL */
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#define LDMAXBAR_CH_REQSEL_SIGSEL_DEFAULT (_LDMAXBAR_CH_REQSEL_SIGSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for LDMAXBAR_CH_REQSEL */
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#define _LDMAXBAR_CH_REQSEL_SOURCESEL_SHIFT 16 /**< Shift value for LDMAXBAR_SOURCESEL */
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#define _LDMAXBAR_CH_REQSEL_SOURCESEL_MASK 0x3F0000UL /**< Bit mask for LDMAXBAR_SOURCESEL */
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#define _LDMAXBAR_CH_REQSEL_SOURCESEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LDMAXBAR_CH_REQSEL */
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#define LDMAXBAR_CH_REQSEL_SOURCESEL_DEFAULT (_LDMAXBAR_CH_REQSEL_SOURCESEL_DEFAULT << 16) /**< Shifted mode DEFAULT for LDMAXBAR_CH_REQSEL */
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/** @} End of group BGM22_LDMAXBAR_BitFields */
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/** @} End of group BGM22_LDMAXBAR */
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/** @} End of group Parts */
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#endif /* BGM22_LDMAXBAR_H */
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