Add layout

main
Nathan L. Conrad 5 years ago
parent 049242c2d4
commit 9edaef32b6

5
.gitignore vendored

@ -1,2 +1,5 @@
/*.sch-bak
/plots/
/*.bck
/*.*-bak
/fp-info-cache
.*.swp

@ -1 +1,337 @@
(kicad_pcb (version 4) (host kicad "dummy file") )
(kicad_pcb (version 20171130) (host pcbnew "(5.1.6-0-10_14)")
(general
(thickness 1.5748)
(drawings 8)
(tracks 20)
(zones 0)
(modules 4)
(nets 21)
)
(page USLetter)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user hide)
(41 Cmts.User user hide)
(44 Edge.Cuts user)
(45 Margin user hide)
(46 B.CrtYd user hide)
(47 F.CrtYd user hide)
)
(setup
(last_trace_width 1.2192)
(trace_clearance 0.254)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 1.2192)
(via_size 0.508)
(via_drill 0.254)
(via_min_size 0.508)
(via_min_drill 0.254)
(uvia_size 0.508)
(uvia_drill 0.254)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.254)
(edge_width 0.0508)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.127)
(mod_text_size 1.016 0.9144)
(mod_text_width 0.127)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.0508)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 "Net-(J1-Pad10)")
(net 2 "Net-(J1-Pad9)")
(net 3 "Net-(J1-Pad8)")
(net 4 "Net-(J1-Pad7)")
(net 5 "Net-(J1-Pad6)")
(net 6 "Net-(J1-Pad5)")
(net 7 "Net-(J1-Pad4)")
(net 8 "Net-(J1-Pad3)")
(net 9 "Net-(J1-Pad2)")
(net 10 "Net-(J1-Pad1)")
(net 11 "Net-(J3-Pad10)")
(net 12 "Net-(J3-Pad9)")
(net 13 "Net-(J3-Pad8)")
(net 14 "Net-(J3-Pad7)")
(net 15 "Net-(J3-Pad6)")
(net 16 "Net-(J3-Pad5)")
(net 17 "Net-(J3-Pad4)")
(net 18 "Net-(J3-Pad3)")
(net 19 "Net-(J3-Pad2)")
(net 20 "Net-(J3-Pad1)")
(net_class Default "This is the default net class."
(clearance 0.254)
(trace_width 1.2192)
(via_dia 0.508)
(via_drill 0.254)
(uvia_dia 0.508)
(uvia_drill 0.254)
(diff_pair_width 1.2192)
(diff_pair_gap 0.254)
(add_net "Net-(J1-Pad1)")
(add_net "Net-(J1-Pad10)")
(add_net "Net-(J1-Pad2)")
(add_net "Net-(J1-Pad3)")
(add_net "Net-(J1-Pad4)")
(add_net "Net-(J1-Pad5)")
(add_net "Net-(J1-Pad6)")
(add_net "Net-(J1-Pad7)")
(add_net "Net-(J1-Pad8)")
(add_net "Net-(J1-Pad9)")
(add_net "Net-(J3-Pad1)")
(add_net "Net-(J3-Pad10)")
(add_net "Net-(J3-Pad2)")
(add_net "Net-(J3-Pad3)")
(add_net "Net-(J3-Pad4)")
(add_net "Net-(J3-Pad5)")
(add_net "Net-(J3-Pad6)")
(add_net "Net-(J3-Pad7)")
(add_net "Net-(J3-Pad8)")
(add_net "Net-(J3-Pad9)")
)
(module 2x10-dip-adapter:PinHeader_1x10_P2.54mm_Vertical locked (layer F.Cu) (tedit 5F2DD82C) (tstamp 5F2E171D)
(at 143.51 96.52)
(descr "Through-hole straight pin header, 1x10, 2.54mm pitch")
(path /5EFD980D)
(fp_text reference J4 (at 0 -2.27) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x10 (at 0 25.13) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 24.13) (end -1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 24.13) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -1.27) (end -1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 24.13) (end 1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 24.13) (end 1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 11.43 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 10 thru_hole circle (at 0 22.86) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 11 "Net-(J3-Pad10)"))
(pad 9 thru_hole circle (at 0 20.32) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 12 "Net-(J3-Pad9)"))
(pad 8 thru_hole circle (at 0 17.78) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 13 "Net-(J3-Pad8)"))
(pad 7 thru_hole circle (at 0 15.24) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 14 "Net-(J3-Pad7)"))
(pad 6 thru_hole circle (at 0 12.7) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 15 "Net-(J3-Pad6)"))
(pad 5 thru_hole circle (at 0 10.16) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 16 "Net-(J3-Pad5)"))
(pad 4 thru_hole circle (at 0 7.62) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 17 "Net-(J3-Pad4)"))
(pad 3 thru_hole circle (at 0 5.08) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 18 "Net-(J3-Pad3)"))
(pad 2 thru_hole circle (at 0 2.54) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 19 "Net-(J3-Pad2)"))
(pad 1 thru_hole circle (at 0 0) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 20 "Net-(J3-Pad1)"))
)
(module 2x10-dip-adapter:PinHeader_1x10_P2.54mm_Vertical locked (layer F.Cu) (tedit 5F2DD82C) (tstamp 5F2E1706)
(at 140.97 96.52)
(descr "Through-hole straight pin header, 1x10, 2.54mm pitch")
(path /5EFDAD79)
(fp_text reference J3 (at 0 -2.27) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x10 (at 0 25.13) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 24.13) (end -1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 24.13) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -1.27) (end -1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 24.13) (end 1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 24.13) (end 1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 11.43 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 10 thru_hole circle (at 0 22.86) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 11 "Net-(J3-Pad10)"))
(pad 9 thru_hole circle (at 0 20.32) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 12 "Net-(J3-Pad9)"))
(pad 8 thru_hole circle (at 0 17.78) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 13 "Net-(J3-Pad8)"))
(pad 7 thru_hole circle (at 0 15.24) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 14 "Net-(J3-Pad7)"))
(pad 6 thru_hole circle (at 0 12.7) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 15 "Net-(J3-Pad6)"))
(pad 5 thru_hole circle (at 0 10.16) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 16 "Net-(J3-Pad5)"))
(pad 4 thru_hole circle (at 0 7.62) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 17 "Net-(J3-Pad4)"))
(pad 3 thru_hole circle (at 0 5.08) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 18 "Net-(J3-Pad3)"))
(pad 2 thru_hole circle (at 0 2.54) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 19 "Net-(J3-Pad2)"))
(pad 1 thru_hole circle (at 0 0) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 20 "Net-(J3-Pad1)"))
)
(module 2x10-dip-adapter:PinHeader_1x10_P2.54mm_Vertical locked (layer F.Cu) (tedit 5F2DD82C) (tstamp 5F2E16EF)
(at 138.43 96.52)
(descr "Through-hole straight pin header, 1x10, 2.54mm pitch")
(path /5EFD3F09)
(fp_text reference J2 (at 0 -2.27) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x10 (at 0 25.13) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 24.13) (end -1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 24.13) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -1.27) (end -1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 24.13) (end 1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 24.13) (end 1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 11.43 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 10 thru_hole circle (at 0 22.86) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 1 "Net-(J1-Pad10)"))
(pad 9 thru_hole circle (at 0 20.32) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 2 "Net-(J1-Pad9)"))
(pad 8 thru_hole circle (at 0 17.78) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 3 "Net-(J1-Pad8)"))
(pad 7 thru_hole circle (at 0 15.24) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 4 "Net-(J1-Pad7)"))
(pad 6 thru_hole circle (at 0 12.7) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 5 "Net-(J1-Pad6)"))
(pad 5 thru_hole circle (at 0 10.16) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 6 "Net-(J1-Pad5)"))
(pad 4 thru_hole circle (at 0 7.62) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 7 "Net-(J1-Pad4)"))
(pad 3 thru_hole circle (at 0 5.08) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 8 "Net-(J1-Pad3)"))
(pad 2 thru_hole circle (at 0 2.54) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 9 "Net-(J1-Pad2)"))
(pad 1 thru_hole circle (at 0 0) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 10 "Net-(J1-Pad1)"))
)
(module 2x10-dip-adapter:PinHeader_1x10_P2.54mm_Vertical locked (layer F.Cu) (tedit 5F2DD82C) (tstamp 5F2E16D8)
(at 135.89 96.52)
(descr "Through-hole straight pin header, 1x10, 2.54mm pitch")
(path /5EFD696A)
(fp_text reference J1 (at 0 -2.27) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x10 (at 0 25.13) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 24.13) (end -1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 24.13) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 -1.27) (end -1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 24.13) (end 1.27 24.13) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 24.13) (end 1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 11.43 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 10 thru_hole circle (at 0 22.86) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 1 "Net-(J1-Pad10)"))
(pad 9 thru_hole circle (at 0 20.32) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 2 "Net-(J1-Pad9)"))
(pad 8 thru_hole circle (at 0 17.78) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 3 "Net-(J1-Pad8)"))
(pad 7 thru_hole circle (at 0 15.24) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 4 "Net-(J1-Pad7)"))
(pad 6 thru_hole circle (at 0 12.7) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 5 "Net-(J1-Pad6)"))
(pad 5 thru_hole circle (at 0 10.16) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 6 "Net-(J1-Pad5)"))
(pad 4 thru_hole circle (at 0 7.62) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 7 "Net-(J1-Pad4)"))
(pad 3 thru_hole circle (at 0 5.08) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 8 "Net-(J1-Pad3)"))
(pad 2 thru_hole circle (at 0 2.54) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 9 "Net-(J1-Pad2)"))
(pad 1 thru_hole circle (at 0 0) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask)
(net 10 "Net-(J1-Pad1)"))
)
(gr_arc (start 135.89 119.38) (end 134.62 119.38) (angle -90) (layer Edge.Cuts) (width 0.0508))
(gr_arc (start 143.51 119.38) (end 143.51 120.65) (angle -90) (layer Edge.Cuts) (width 0.0508))
(gr_arc (start 143.51 96.52) (end 144.78 96.52) (angle -90) (layer Edge.Cuts) (width 0.0508))
(gr_arc (start 135.89 96.52) (end 135.89 95.25) (angle -90) (layer Edge.Cuts) (width 0.0508))
(gr_line (start 134.62 119.38) (end 134.62 96.52) (layer Edge.Cuts) (width 0.0508) (tstamp 5F2E1438))
(gr_line (start 143.51 120.65) (end 135.89 120.65) (layer Edge.Cuts) (width 0.0508))
(gr_line (start 144.78 96.52) (end 144.78 119.38) (layer Edge.Cuts) (width 0.0508))
(gr_line (start 135.89 95.25) (end 143.51 95.25) (layer Edge.Cuts) (width 0.0508))
(segment (start 135.89 119.38) (end 138.43 119.38) (width 1.2192) (layer B.Cu) (net 1))
(segment (start 135.89 116.84) (end 138.43 116.84) (width 1.2192) (layer F.Cu) (net 2))
(segment (start 135.89 114.3) (end 138.43 114.3) (width 1.2192) (layer B.Cu) (net 3))
(segment (start 135.89 111.76) (end 138.43 111.76) (width 1.2192) (layer F.Cu) (net 4))
(segment (start 135.89 109.22) (end 138.43 109.22) (width 1.2192) (layer B.Cu) (net 5))
(segment (start 135.89 106.68) (end 138.43 106.68) (width 1.2192) (layer F.Cu) (net 6))
(segment (start 135.89 104.14) (end 138.43 104.14) (width 1.2192) (layer B.Cu) (net 7))
(segment (start 135.89 101.6) (end 138.43 101.6) (width 1.2192) (layer F.Cu) (net 8))
(segment (start 135.89 99.06) (end 138.43 99.06) (width 1.2192) (layer B.Cu) (net 9))
(segment (start 135.89 96.52) (end 138.43 96.52) (width 1.2192) (layer F.Cu) (net 10))
(segment (start 140.97 119.38) (end 143.51 119.38) (width 1.2192) (layer F.Cu) (net 11))
(segment (start 140.97 116.84) (end 143.51 116.84) (width 1.2192) (layer B.Cu) (net 12))
(segment (start 140.97 114.3) (end 143.51 114.3) (width 1.2192) (layer F.Cu) (net 13))
(segment (start 140.97 111.76) (end 143.51 111.76) (width 1.2192) (layer B.Cu) (net 14))
(segment (start 140.97 109.22) (end 143.51 109.22) (width 1.2192) (layer F.Cu) (net 15))
(segment (start 140.97 106.68) (end 143.51 106.68) (width 1.2192) (layer B.Cu) (net 16))
(segment (start 140.97 104.14) (end 143.51 104.14) (width 1.2192) (layer F.Cu) (net 17))
(segment (start 140.97 101.6) (end 143.51 101.6) (width 1.2192) (layer B.Cu) (net 18))
(segment (start 140.97 99.06) (end 143.51 99.06) (width 1.2192) (layer F.Cu) (net 19))
(segment (start 140.97 96.52) (end 143.51 96.52) (width 1.2192) (layer B.Cu) (net 20))
)

@ -1,4 +1,4 @@
(module PinHeader_1x10_P2.54mm_Vertical (layer F.Cu) (tedit 5EFD404A)
(module PinHeader_1x10_P2.54mm_Vertical (layer F.Cu) (tedit 5F2DD82C)
(descr "Through-hole straight pin header, 1x10, 2.54mm pitch")
(fp_text reference REF** (at 0 -2.27) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
@ -17,19 +17,14 @@
(fp_text user %R (at 0 11.43 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole circle (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x10_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
(pad 1 thru_hole circle (at 0 0) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 0 2.54) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 0 5.08) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at 0 7.62) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole circle (at 0 10.16) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole circle (at 0 12.7) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole circle (at 0 15.24) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole circle (at 0 17.78) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole circle (at 0 20.32) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole circle (at 0 22.86) (size 1.778 1.778) (drill 1) (layers *.Cu *.Mask))
)

@ -1,29 +1,10 @@
update=22/05/2015 07:44:53
update=Friday, August 07, 2020 at 05:47:50 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
@ -31,3 +12,227 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.5748
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=1.2192
MinViaDiameter=0.508
MinViaDrill=0.254
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.254
MinHoleToHole=0.254
TrackWidth1=1.2192
ViaDiameter1=0.508
ViaDrill1=0.254
dPairWidth1=1.2192
dPairGap1=0.254
dPairViaGap1=0.25
SilkLineWidth=0.127
SilkTextSizeV=0.9144
SilkTextSizeH=1.016
SilkTextSizeThickness=0.127
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.0508
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.0508
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=0
[pcbnew/Layer.F.Adhes]
Enabled=0
[pcbnew/Layer.B.Paste]
Enabled=0
[pcbnew/Layer.F.Paste]
Enabled=0
[pcbnew/Layer.B.SilkS]
Enabled=0
[pcbnew/Layer.F.SilkS]
Enabled=0
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=0
[pcbnew/Layer.Eco2.User]
Enabled=0
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=0
[pcbnew/Layer.F.Fab]
Enabled=0
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.254
TrackWidth=1.2192
ViaDiameter=0.508
ViaDrill=0.254
uViaDiameter=0.508
uViaDrill=0.254
dPairWidth=1.2192
dPairGap=0.254
dPairViaGap=0.25

Loading…
Cancel
Save